D.V. Efanov, Doctor of Science (Tech.)
Federal State Autonomous Educational Institution of Higher Education
“Russian University of Transport”
Russian Federation, 127994, Moscow, Obraztsova str., build. 9/9,
contact phone number (+7) (911) 709 21 64, e-mail:
V.V. Sapozhnikov, Doctor of Science (Tech.),
Vl.V. Sapozhnikov, Doctor of Science (Tech.),
Federal State Budgetary Educational Institution of Higher Education
“Emperor Alexander I St. Petersburg State Transport University”
Russian Federation, 190031, St. Petersburg, Moskovsky ave., 9,
contact phone number (+7) (812) 457 85 79, e-mail:
Èlektron. model. 2021, 43(1):28-45
ABSTRACT
The presented paper is devoted to the development of the Boolean complement method for the organization of the self-checking concurrent error-detection (CED) systems for digital devices. The article considers the features of using the modular sum codes (Bose-Lin codes) for these purposes, especially the Bose-Lin code by the modulo M = 4. This code has two check bits and only four different check vectors, this makes it easier to use it in the organization of the self-checking CED system. The article presents the block diagrams of the organization of the CED system by the method of Boolean complement to the considered modular sum code. The examples of the CED system synthesis by the Boolean complement method are given. The article defines the restrictions imposed on the CED systems synthesis procedure, and also forms an algorithm for synthesizing a self-checking CED systems by the method of the Boolean complement to the Bose-Lin code by the modulo M = 4.
KEYWORDS
self-checking discrete device; self-checking concurrent error-detection systems; duplication method; Boolean complement method; Bose-Lin code; testability.
REFERENCES
- Parkhomenko, P.P. and Sogomonyan, E.S. (1981), Osnovy tekhnicheskoj diagnostiki (optimizatsija algoritmov diagnostirovanija, apparaturnyje sredstva) [Basics of technical diagnostics (optimization of diagnostic algorithms and equipment)], Energoatomizdat, Moscow, USSR.
- Sogomonyan, E.S. and Slabakov, E.V. (1989), Samoproverjaemyje ustrojstva i otkazoustojchivyje sistemy [Self-checking devices and failover systems], Radio i Svjaz`, Moscow, USSR.
- Sapozhnikov, V.V., Sapozhnikov, Vl.V., Hristov, H.A. and Gavzov, D.V. (1995), Metody postroeniya bezopasnyh mikroehlektronnyh sistem zheleznodorozhnoj avtomatiki [Methods for constructing safety microelectronic systems for railway automation], Transport, Moscow, Russia.
- Goessel, M. and Graf, S. (1994), Error Detection Circuits, McGraw-Hill, London, UK.
- Nicolaidis, M. and Zorian, Y. (1998), “On-Line Testing for VLSI – А Compendium of Approaches”, Journal of Electronic Testing: Theory and Applications, Vol. 12, pp. 7-20.
https://doi.org/10.1023/A:1008244815697 - Goessel, M., Morozov, A.V., Sapozhnikov, V.V. and Sapozhnikov, Vl.V. (2005), “Checking Combinational Circuits by the Method of Logic Complement”, Avtomatika i telemekhanika, Vol. 8, pp. 161—172.
https://doi.org/10.1007/s10513-005-0174-2 - Mikoni, S.V. (1992), Obshchie diagnosticheskie bazy znanij vychislitel'nyh sistem [General Diagnostic Knowledge Base of Computing Systems], SPIIRAN, St. Petersburg, Russia.
- Mitra, S. and McCluskey, E.J. (2000), “Which Concurrent Error Detection Scheme to Choose?”, Proceedings of International Test Conference, USA, Atlantic City, NJ, October 03-05, 2000, pp. 985-994.
https://doi.org/10.1109/TEST.2000.894311 - Das, D., Touba, N.A., Seuring, M. and Gossel, M. (2000), “Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes”, Proceedings of IEEE 6th International On-Line Testing Workshop (IOLTW), Spain, Palma de Mallorca, July 3-5, 2000, pp. 171-176.
- Piestrak, S.J. (1995), Design of Self-Testing Checkers for Unidirectional Error Detecting Codes, Oficyna Wydawnicza Politechniki Wrocłavskiej, Warsaw, Poland.
- Efanov, D., Sapozhnikov, V. and Sapozhnikov, Vl. (2017), “Generalized Algorithm of Building Summation Codes for the Tasks of Technical Diagnostics of Discrete Systems”, Proceedings of 15th IEEE East-West Design & Test Symposium (EWDTS`2017), Novi Sad, Serbia, September 29 – October 2, 2017, pp. 365-371.
https://doi.org/10.1109/EWDTS.2017.8110126 - Busaba, F.Y. and Lala, P.K. (1994), “Self-Checking Combinational Circuit Design for Single and Unidirectional Multibit Errors”, Journal of Electronic Testing: Theory and Applications, Vol. 1, pp. 19-28.
https://doi.org/10.1007/BF00971960 - Morosow, A., Saposhnikov, V.V., Saposhnikov, Vl.V. and Goessel, M. (1998), “Self-Checking Combinational Circuits with Unidirectionally Independent Outputs”, VLSI Design, Vol. 5, № 4, pp. 333-345.
https://doi.org/10.1155/1998/20389 - Goessel, M., Morozov, A.V., Sapozhnikov, V.V. and Sapozhnikov, Vl.V. (2003), “Logic Complement, a New Method of Checking the Combinational Circuits”, Avtomatika i telemekhanika, Vol. 1, pp. 167-176.
- Saposhnikov, Vl.V., Dmitriev, A., Goessel, M. and Saposhnikov, V.V. (1996), “Self-Dual Parity Checking – a New Method for on Line Testing”, Proceedings of 14th IEEE VLSI Test Symposium, USA, Princeton, 1996, pp. 162-168.
https://doi.org/10.1109/VTEST.1996.510852 - Göessel, M., Ocheretny, V., Sogomonyan, E. and Marienfeld, D. (2008), New Methods of Concurrent Checking: Edition 1, Springer Science+Business Media B.V., Dordrecht, Netherlands.
- Efanov, D., Sapozhnikov, V., Sapozhnikov, Vl., Osadchy, G. and Pivovarov, D. (2019), “Self-Dual Complement Method up to Constant-Weight Codes for Arrangement of Combinational Logical Circuits Concurrent Error-Detection Systems”, Proceedings of 17th IEEE East-West Design & Test Symposium (EWDTS`2019), Batumi, Georgia, September 13-16, 2019, pp. 136-143.
https://doi.org/10.1109/EWDTS.2019.8884398 - Sapozhnikov, V.V., Sapozhnikov, Vl.V., Efanov, D.V. and Pivovarov, D.V. (2017), “Boolean Complement Method Based on Constant-Weight Code «1-out-of-4» for Formation of Totally Self-Checking Concurrent Error Detection Systems”, Elektronnoe modelirovanie, Vol. 39, № 2, pp. 15—34.
https://doi.org/10.15407/emodel.39.02.015 - Efanov, D.V., Sapozhnikov, V.V., Sapozhnikov, Vl.V. and Pivovarov, D.V. (2020), “The Synthesis Conditions of Completely Self-Testing Embedded-Control Circuits Based on the Boolean Complement Method to the «1-out-of-m» Constant-Weight Code”, Automatic Control and Computer Sciences, Vol. 54, № 2, pp. 89-99.
https://doi.org/10.3103/S0146411620020042 - Sen, S.K. (2010), “A Self-Checking Circuit for Concurrent Checking by 1-out-of-4 code with Design Optimization using Constraint Don’t Cares”, National Conference on Emerging trends and advances in Electrical Engineering and Renewable Energy (NCEEERE 2010), Sikkim Manipal Institute of Technology, Sikkim, India, December 22-24, 2010.
- Das, D.K., Roy, S.S., Dmitiriev, A., Morozov, A. and Gössel, M. (2012), “Constraint Don’t Cares for Optimizing Designs for Concurrent Checking by 1-out-of-3 Codes”, Proceedings of the 10th International Workshops on Boolean Problems, Freiberg, Germany, September, 2012, pp. 33-40.
- Sapozhnikov, V.V., Sapozhnikov, Vl.V. and Goessel, M. (2001), Samodvojstvennye diskretnye ustrojstva [Self-Dual Discrete Devices], Energoatomizdat, St. Petersburg, Russia.
- Lala, P.K. (2001), Self-Checking and Fault-Tolerant Digital Design, Morgan Kaufmann Publishers, San Francisco, USA.
- Morozov, M., Saposhnikov, V.V., Saposhnikov, Vl.V. and Goessel, M. (2000), “New Self-Checking Circuits by Use of Berger-codes”, Proceedings of 6th IEEE International On-Line Testing Workshop, Palma De Mallorca, Spain, July 3-5, 2000, 171-176.
https://doi.org/10.1109/OLT.2000.856626 - Berger, J.M. (1961), “A Note on Error Detection Codes for Asymmetric Channels”, Information and Control, Vol. 4, № 1, pp. 68-73.
https://doi.org/10.1016/S0019-9958(61)80037-5 - Bose, B. and Lin, D.J. (1985), “Systematic Unidirectional Error-Detection Codes”, IEEE Transaction on Computers, Vol. C-34, pp. 1026-1032.
https://doi.org/10.1109/TC.1985.1676535 - Das, D. and Touba, N.A. (1999), “Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes”, Journal of Electronic Testing: Theory and Applications, Vol. 15, № 1-2, pp. 145-155.
https://doi.org/10.1023/A:1008344603814 - Jha, N.K. (1991), “Totally Self-Checking Checker Designs for Bose-Lin, Bose and Blaum Codes”, IEEE Transaction on Computer-Aided Design, Vol. 10, № 1, pp. 136-143.
https://doi.org/10.1109/43.62799 - Nikolos, D. and Kavousianos, X. (1999), “Modular TSC Checkers for Bose-Lin and Bose Codes”, Proceedings of the 17th IEEE VLSI Test Symposium, Dana Point, USA, April 25-29, 1999, pp. 354-360.
- Sapozhnikov, V.V., Sapozhnikov, Vl.V. and Efanov, D.V. (2020), Kody s summirovaniem dlya sistem tekhnicheskogo diagnostirovaniya. Tom 1: Klassicheskie kody Bergera i ih modifikacii [Sum Codes for Technical Diagnostics Systems. Volume 1: Classical Berger Codes and Their Modifications], Nauka, Moscow, Russia.
- Efanov, D.V., Sapozhnikov, V.V. and Sapozhnikov, Vl.V. (2017), “Conditions for Detecting a Logical Element Fault in a Combination Device under Concurrent Checking Based on Berger`s Code”, Avtomatika i telemekhanika, Vol. 5, pp. 152-165.
https://doi.org/10.1134/S0005117917050113 - Efanov, D.V., Sapozhnikov, V.V., Sapozhnikov, Vl.V. and Pivovarov, D.V. (2018), “The «2-out-of-4» constant-weight code application in the self-checking check circuits organization based on the Boolean complement method”, Informatika, Vol. 15, № 4, pp. 71- 85.
- Nikolos, D. (1998), “Self-Testing Embedded Two-Rail Checkers”, Journal of Electronic Testing: Theory and Applications, Vol. 12, № 1-2, pp. 69-79.
https://doi.org/10.1007/978-1-4757-6069-9_7