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  5. VOL 40, NO 2 (2018)
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  7. 2015 год
  8. 37-1

Electronic Modeling

VOL 37, NO 1 (2015)

CONTENTS

Mathematical Modeling and Computation Methods

  MELIKOV A.Z., JAFAR-ZADE T.I.
Model of Queuing System with Jump Priorities
3-14
  GAMZAEV Kh.M.
Numerical Solution of Problem of Unsaturated Filtration with a Moving Boundary
15-24

Computational Processes and Systems

  SAPOZHNIKOV V.V., SAPOZHNIKOV Vl.V., EFANOV D.V., NIKITIN D.A.
Research of Properties of Codes with Summation with One Weighted Data Bit in Concurrent Error
Detection Systems
25-48
 

HAHANOV V.I., BAGHDADI AMMAR AWNI ABBAS, LITVINOVA E.I., SHKIL A.S.
Qubit Data Structures for Computer Devices
49-76
  MINAEV Yu.N., FILIMONOVA O.Yu., MINAEVA J.I.
Structured FS-Granules in Problems of Granular Computing
77-96

Parallel Computations

  BOYKO A.V., ZHELEZNYAK M.I.
Technology of Parallel Processing of Spatially Distributed Data for Runoff Model of River Watershed
97-112

Application of Modeling Methods and Facilities

  KLIPKOV S.I.
Features of the Harmonic Analysis of Limit Modes of Electrical Systems
113-127

MODEL OF QUEUING SYSTEM WITH JUMP PRIORITIES

A.Z. Melikov, T.I. Jafar-zade

ABSTRACT

An algorithmic approach to studying the queuing system with jump priorities is proposed. It is assumed that upon arrival of call with low priority only one call of the same type can either jump to the queue of calls with high priority or join own queue. These decisions depend on the number of high priority calls in a queue. Algorithms to calculate the characteristics of the model with separate buffers are developed. Results of numerical experiments are shown.

KEYWORDS

queuing mode, jump priority, quality of service metrics, calculation algorithm.

REFERENCES

1. Lim Y., Kobza J.E. Analysis of delay dependent priority discipline in an integrated multiclass traffic fast packet switch // IEEE Transactions on Communications.—1990.—Vol. 38, No 5.— P. 659—665.
2. Melikov A.Z., Feyziyev V.Sh., Nagiyev F.N. Algorithmic approach to analysis of queue model with jump priorities // Electronic Modeling.—2012.—Vol. 34, No 12.—P. 69—80 (in Russian).
3. Maertens T., Walraevens J., Bruneel H. On priority queues with priority jumps // Performance Evaluation.— 2006.— Vol. 63, No 12. — P. 1235—1252.
4. Maertens T., Walraevens J., Bruneel H.A Modified HOL priority scheduling discipline: Performance analysis // Europ. J. of Operational Research. — 2007. — Vol. 180, No 3. — P. 1168—1185.
5. Maertens T., Walraevens J., Moeneclaey M., Bruneel H.A New dynamic priority scheme: Performance Analysis // Proc. 13th Int. Conf. on Analytical and Stochastic Modeling Techniques and Applications (ASMTA). — 2006. —P. 74—84.
6. Melikov A.Z., Kim C.S., Ponomarenko L.A. Algorithmic approach to analysis of queuing system with finite buffers and jump priorities // J. of Automation and Information Sciences. — 2012. — Vol. 44, No 12. — P. 43—54.
7. Melikov A.Z., Kim C.S., Ponomarenko L.A. Approximate method to analysis of queueing models with jump priorities // Automation and Remote Control.— 2013.—Vol. 74, No 1.— P. 62—75.
8. Melikov A.Z., Kim C.S., Ponomarenko L.A. Numerical method for analysis of queuing models with priority jumps //Cybernetics and System Analysis.—2013.—Vol. 49, No 1.—P.55—61.
9. Oh Y., Kim C.S., Melikov A. A space merging approach to the analysis of the performance of queueing systems with finite buffers and priority jumps // Industrial Engineering and Management Systems. — 2013.— Vol. 12, No 3. — P. 274—280.

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NUMERICAL SOLUTION OF PROBLEM OF UNSATURATED FILTRATION WITH A MOVING BOUNDARY

Kh.M. Gamzaev

ABSTRACT

The article describes the process of filtration of a fluid with partial saturation then described by a nonlinear parabolic equation in a region with moving boundary. The inverse problem is posed on determination of filtration flow speed in the inlet section of the porous medium under the given law of motion of a mobile boundary. Applying methods of rectification fronts and differential approximation, the problem is reduced to solving systems of difference equations. A numerical algorithm was proposed to solve the obtained system of difference equations.

KEYWORDS

unsaturated filtering, boundary value problem with moving boundary, inverse problem, the method of straightening fronts, difference method.

REFERENCES

1. Polubarinova-Kîchinà P.Y. Theory of the movement of ground waters.—Moscow: Nauka, 1977 (in Russian).
2. Verigin N.N., et al. Hydrodynamic and physical and chemical properties of rocks. — Moscow: Nedra, 1977 (in Russian).
3. Bondarenko N.F. Physics of Motion of Underground Waters.—Moscow: Nedra, 1973. (in Russian).
4. Richards L.A. Capillary conduction of liquids through porous mediums // Appl. Physics.—1931.— Vol. 1, No 5. — P. 318—322.
5. Bear J. Hydraulics of Groundwater. — NY : McGraw-Hill Inc., 1979.
6. Venttsel T.D. About one task with free border for the heat conduction equation // Papers Acad. Sc. of the USSR — 1960. — Vol. 131, No 5— P. 1000—1003 (in Russian).
7. Vabishchevich P.N. Numerical Methods for Solution of Problems with Free Border.—Moscow:— Moscow University Press, 1987 (in Russian).
8. Samarskiy A.A., Vabishchevich P.N. Computing Heat Transfer. — Ìoscow: Editorial of URSS, 2003 (in Russian).
9. Kosterina E.A., Lapin A.V. Solution of a problem on saturated-unsaturated filtration of liquid in soil with tracking the front of a saturation // Proc. of Higher Educational Institutions, Mathematics. — 1995.— No 6. — P. 42—50 (in Russian).
10. Samarskiy A.A., Vabishchevich P.N. Numerical methods for solution of inverse problems of mathematical physics. — Moscow: LKI Publishing House, 2009 (in Russian).
11. Alifanov O.M., Artyukhin E.A., Rumyantsev S.V. Extreme Methods for Solution of Incorrect Problems. — Moscow: Nauka, 1988 (in Russian).
12. Gamzaev Kh.M. Numerical Method for Solving the Inverse Problem of Water-Oil Plug Displacement from the Oil Pool // Engineering Physics J.—2012.—Vol. 85, No 5.— P. 1004—1010 (in Russian).

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RESEARCH OF PROPERTIES OF CODES WITH SUMMATION WITH ONE WEIGHTED DATA BIT IN CONCURRENT ERROR DETECTION SYSTEMS

V.V. Sapozhnikov, Vl.V. Sapozhnikov, D.V. Efanov, D.A. Nikitin

ABSTRACT

The new class of codes with summation with the improved characteristics of error detection in data bits in comparison with the known codes with summation is considered. Properties of the new class of codes are established, allowing the practical choosing of the best variant of coding at the organization of concurrent error detection system. A method of synthesis of generators for new codes and ways of simplification of generators schemes are described.

KEYWORDS

concurrent error detection, undetectable error, data bits, Berger code, weightbased code with summation, code properties, generator, checker.

REFERENCES

1. McCluskey E.J. Logic Design Principles: With Emphasis on Testable Semicustom Circuits. — N.J.: Prentice Hall PTR, 1986. –– 549 p.
2. Sogomonyan E.S., Slabakov E.V. Self-Checking Devices and Fault-Tolerant Systems. — Moscow.: Radio and Telecommunication, 1989. — 208 p. (in Russian).
3. Lala P.K. Self-Checking and Fault-Tolerant Digital Design. — San Francisco: Morgan Kaufmann Publishers, 2001.— 216 p.
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5. Gîessel M., Ocherethy V., Sogomonyan E., Marienfield D. New Methods of Concurrent Checking: Edition 1. — Dordrecht: Springer Science+Business Media, 2008. – 184 p.
6. Ubar R., Raik J., Vierhaus H.-T. Design and Test Technology for Dependable Systemson-Chip (Premier Reference Source) // Information Science Reference, Hershey — New York: IGI Global, 2011.— 578 p.
7. Wang L-T., Stroud C.E., Touba N.A. System-on-Chip Test Architectures: Nanometer Design for Testability.— Morgan Kaufmann Publishers, 2008. —856 p.
8. Fujiwara E. Code Design for Dependable Systems: Theory and Practical Applications. — John Wiley & Sons, 2006.— 720 p.
9. Dutta A., Touba N.A. Synthesis of Non-Intrusive Concurrent Error Detection Using an Even Error Detection Function // International Test Conf. (ITC).— 2005.— P. 1059—1066.
10. Sapozhnikov V.V., Sapozhnikov Vl.V. Self-Checking Discrete Devices. — St.-Petersburg: Energoatomizdat, 1992.— 224 p. (in Russian).
11. Aksjonova G.P. Necessary and Sufficient Conditions for the Construction of a Fully Testable Circuits Convolution on Modulo 2 // Automation and Remote Control.—1979.—Nî 9.— P. 126—135 (in Russian).
12. Richter M., Goessel M. Concurrent Checking With Split-Parity Codes // Proc. of the 15th IEEE International On-Line Testing Symposium (IOLTS). — Portugal, Sesimbra-Lisabon, June 24—26, 2009.— P. 159—163.
13. Saposhnikov V.V., Saposhnikov Vl.V., Dmitriev A.V. et al. Organization of Concurrent Error Detection Systems for Combinational Circuits by the Method of Logic Complement // Electronic Modeling.— 2002.— Vol. 24, No 6. — P. 52—66 (in Russian).
14. Parkhomenko P.P., Sogomonyan E.S. Technical Diagnosis Fundamentals (Diagnostic Algoritm Optimization, Apparatus Means). — Moscow: Energoatomizdat, 1981. — 320 p. (in Russian).
15. Romaschenko A.E., Rumyantsev A.Yu., Shen A. Notes in Coding Theory. – Moscow:MTsNMO, 2011.— 80 p. (in Russian).
16. Matrosova A.Yu., Butorina N.B., Yakimova, N.O. Checker Design Based on Monotonous Function Implementation // Proc. Higher Educ. Inst., Physics.—2013.—Vol. 56, No 9/2.—P. 171—173 (in Russian).
17. GîesselM.,Morozov A.A., Sapozhnikov V.V., Sapozhnikov Vl.V. Synthesis of Self-Checking Combinational Circuits Based on Self-Dual Functions // Automation and Remote Control. — 2000.— No 2. — P. 151—163 (in Russian).
18. Berger J.M. A Note on Error Detection Codes for Asymmetric Channels // Information and Control.— 1961.— Vol. 4, Iss. 1. —P. 68—73.
19. Efanov D.V., Saposhnikov V.V., Saposhnikov Vl.V. On Summation Code Properties in Functional Control Circuits // Automation and Remote Control.—2010.—No 6.—P. 155—162 (in Russian).
20. Blyudov A.A., Efanov D.V., Saposhnikov V.V., Saposhnikov Vl.V. Formation of the Berger Modified Code with Minimum Number of Undetectable Errors of Informational Bits // Electronic Modeling.— 2012.— Vol. 34, No 6. — P. 17—29 (in Russian).
21. Efanov D., Sapozhnikov V., Sapozhnikov Vl., Blyudov A. On the Problem of Selection of Code with Summation for Combinational Circuit Test Organization // Proc. of 11th IEEE East-West Design & Test Symposium (EWDTS'2013). — Rostov-on-Don, Russia, September 27—30, 2013.— P. 261—266.
22. Blyudov A., Efanov D., Sapozhnikov V., Sapozhnikov Vl. Properties of Code with Summation for Logical Circuit Test Organization // Proc. of the 10th IEEE East-West Design & Test Symposium (EWDTS'2012). — Kharkov, Ukraine, September 14—17, 2012. — P. 114—117.
23. Sapozhnikov V.V., Sapozhnikov Vl.V., Gîessel M., Morozov A.A. Method of Construction of Combinational Self-Checking Devices With Detection of All Single Faults // Electronic Modeling.— 1998.— Vol. 20, No 6. — P. 70—80 (in Russian).
24. Morosow A., Saposhnikov V.V., Saposhnikov Vl.V., Goessel M. Self-Checking Combinational Circuits with Unidirectionally Independent Outputs // VLSI Design.—1998.—Vol. 5, Iss. 4. — P. 333—345.
25. Das D., Touba N.A. (1999) Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits // Proc. of the 17th IEEE VLSI Test Symposium.—USA, CA, Dana Point, April 25—29, 1999. — P. 370—376.
26. Ghosh S., Lai K.W., Jone W.B., Chang S.C. Scan Chain Fault Identification Using Weight-Based Codes for SoC Circuits // Proc. of the 13th Asian Test Symposium. — Taiwan, Kenting, November 15—17, 2004.— P. 210—215.
27. Das D., Touba N.A., Seuring M., Gossel M. Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes // Proc. of the 6th IEEE International On-Line Testing Workshop (IOLTW). — Spain, Palma de Mallorca, July 3—5, 2000. — P. 171—176.
28. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V., Nikitin D.A. Method of Constructing the Berger Code with High Error Detecting Efficiency in Information Bits // Electronic Modeling.—2013.— Vol. 35, No 4. — P. 21—34 (in Russian).
29. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Weight-Based Codes with Summation for Checking of Digital Devices Organization // Ibid.—2014.—Vol. 36, No 1.—P. 59—80 (in Russian).
30. Marouf M.A., Friedman D. Design of Self-Checking Checkers for Berger Codes // Proc. of the 8th Annual Intern. Conf. on Fault-Tolerant Computing.—Toulouse.— France, 1978.—P. 179—183.
31. Piestrak S.J. Design of Self-Testing Checkers for Unidirectional Error Detecting Codes.—Wrocaw: Oficyna Wydawnicza Politechniki Wrocavskiej, 1995. — 111 p.
32. Yang S. Logic Synthesis and Optimization Benchmarks User Guide: Version 3.0 / Technical Report Microelectronics Center of North Carolina, P.O. Box 12889, Research Triangle Park, NC 27709, January, 15, 1991.— 44 p.
33. Bose B., Lin D.J. Systematic Unidirectional Error-Detection Codes // IEEE Trans. Comput. — 1985.— Vol. C-34. — P. 1026—1032.
34. Blyudov A.A., Efanov D.V., Sapozhnikov V.V., Sapozhnikov Vl.V. Summation Codes for Organization of Control of Combinational Circuits // Automation and Remote Control. — 2013.— No 6. — P. 153—164 (in Russian).
35. Blyudov A.A., Efanov D.V., Sapozhnikov V.V., Sapozhnikov Vl.V. On Codes with Summation of Data Bits in Concurrent ErrorDetection Systems // Ibid.—2014.—No 8.—P. 131—145 (in Russian).
36. Matrosova A.Yu., Ostanin S.A., Singh V. Detection of False Paths in Logical Circuits by Joint Analysis of the AND/OR Trees and SSBDD-Graphs // Ibid. —2013.—No 7.—P. 126—142 (in Russian).

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QUBIT DATA STRUCTURES FOR COMPUTER DEVICES

V.I. Hahanov, Baghdadi Ammar Awni Abbas, E.I. Litvinova, A.S. Shkil

ABSTRACT

Qubit models and methods for improving the performance of software and hardware for analyzing digital devices by increasing the dimension of data structures and memory are developed. The main concepts, terminology and definitions are introduced for the implementation of quantum computation in practice and analysis of virtual computers. The results of research in the design and modeling computer systems in cyberspace by using a two-component automaton <memory, transaction> are presented.

KEYWORDS

Qubit structure, quantum computing, automaton «memory-transaction», simulation of digital system, processor array.

REFERENCES

1. Michael A. Nielsen, Isaac L. Chuang Quantum Computation and Quantum Information.—Cambridge University Press, 2010.— 676 p.
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3. Whitney M. G. Practical Fault Tolerance for Quantum Circuits : PhD dissertation. University of California, Berkley. — 2009. — 229 p.
4. Mikio Nfrfhara Quantum Computing. An Overview. — Higashi-Osaka: Kinki University, 2010.— 53 p.
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6. Gorbatov V.A. Fundamentals of Discrete Mathematics. — Moscow: Higher School, 1986. — 311 p. (in Russian).
7. Hahanov V.I., Litvinova E.I., Chumachenko S.V. et al. Qubit Model for solving the coverage problem // IEEE Conf. Publications. East-West Design and Test Symposium. Kharkov, 14—17 September, 2012.— DOI:10.1109/EWDTS.2013.6673167.— P. 142—144.
8. Hahanov V.I., Murad Ali Abbas, Litvinova A.I. et al. Quantum models of computer process // Radioelectronics and Informatics. — 2011.— No 3. — P. 35—40 (in Russian).
9. Kurosh A.G. Course of Higher Algebra. — Ìoscow: Nauka, 1968. — 426 p. (in Russian).
10. Hahanov V.I., Litvinova E.I., Guz O.A. Design and Test of Digital System-on-Chip. — Kharkov: KhNURE, 2009.— 484 p. (in Russian).
11. Hahanov V.I. Technical Diagnosis of Digital and Microprocessor Structures.—Kiev: ICIO, 1995.— 242 p. (in Russian).
12. Roth J.P. Diagnosis of automata failures: a calculus and method // IBM Journal of Research and Development. — 1966.— No 7. — P. 18—32.
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14. Bondarenko M.F., Hahanov V.I., Litvinova E.I. Structure of Logical Associative Multiprocessor // Automation and Remote Control.—2012.—No 10.—P. 71—92 (in Russian).
15. Borisovets B.E. , Sharshunov S.G. General Model and Test Synthesis for Control Engines of Interregister Data Exchange in Microprocessors // Ibid. — 1992. — No 8. — P. 142—149 (in Russian).
16. Koal T., Scheit D., Vierhaus H.T. A comprehensive scheme for logic self repair // IEEE Conf. Publications.—Signal Processing Algorithms, Architectures, Arrangements and Applications.—2009.— E-ISBN : 978-8-362065-06-6.— P. 15—18.

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